There are many means for an integrated circuit device to communicate with another integrated circuit device. One of the communication means is Peripheral Component Interconnect Express (PCI Express/PCIe). PCI Express is a high-speed serial bus standard that enables an integrated circuit device to communicate externally via a connection called a link. A link is a point-to-point communication channel between ports of two integrated circuit devices that communicate using the PCI Express protocol. The link allows both of these devices to transmit and receive signals.
Circuits that implement the functions of PCI Express operate at a clock frequency that depends on the link, whereas the circuit fabric of the integrated circuit device operates based on its own internal clock frequency.
Therefore, an asynchronous first-in-first-out (FIFO) register is placed as an interface circuit between the fabric and the circuits that implement functions of PCI Express. The asynchronous FIFO enables the transmission of data signals from a fabric clock frequency domain to a PCI Express clock frequency domain.
Further, the link speed of a PCI Express link may be negotiated quite frequently. The link speed negotiation occurs when demanded by an external device coupled to the PCI Express device. Each time the link speed is negotiated, the PCI Express device is placed in an idle mode to allow itself a recovery. Generally, the idle mode is for a long period and may affect data transmission throughputs of the PCI Express device.